A card inserted in a device, such as a router, utilizing a PCI backplane, must be configured and assigned specific resources in the backplane such as “ID select” lines, IRQs, memory regions, and DMA channels. Additionally, a card may include a non-volatile memory, sometimes called a “cookie”, that holds information about the card and must be queried by the host.
One example of an interface for performing these functions is the Serial Peripheral Interface (SPI) bus, which is a serial bus for eight and sixteen bit data transfer operations. As depicted in FIG. 1A, there are a separate data lines for transmission and reception, and a device coupled to the bus may be a transmitter or a receiver. The devices connected to the SPI bus may be classified as Master or Slave. A Master device initiates an information transfer on the bus and generates clock and control signals. A Slave device is controlled by a Master through a slave select (chip enable) line. Generally, a dedicated select line is required for each slave device.
The SPI protocol allows a transmitter to latch/change data on either the rising or falling clock edge and allows a receiver to sample data on either the rising or falling clock edge. Generally, data is sampled at the receiver by a clock edge opposite to the clock edge used to latch/change data at the transmitter to maximize the tolerance for timing edges.
In practice, different manufacturers have implemented the SPI interface with different latching/sampling schemes. Some have latched on the rising edge and sampled on the falling edge and vice versa. A system implementing one scheme will not be compatible with a system implementing another scheme.
The challenges in the field of communications continue to increase with demands for more and better techniques having greater flexibility and adaptability. Therefore, a need has arisen for a new system and method for allowing compatibility between different SPI implementation schemes.
In accordance with various embodiments of the present invention, a system and method for transferring data between devices coupled to an SPI bus is provided that addresses disadvantages and problems associated with previously developed systems and methods.